Towards Autonomous Accelerator Design: FPGA Accelerator Generation with SECDA

The paper presents SECDA-DSE, an advanced framework that integrates Large Language Models into the SECDA ecosystem to automate the design space exploration of FPGA-based accelerators. It successfully generates and executes three accelerator designs—element-wise vector multiplication, 2D convolution, and matrix transpose—demonstrating the capability of LLMs to optimize architectural configurations while significantly reducing exploration time and reliance on domain expertise. This development is significant for practitioners as it enhances the efficiency of designing hardware accelerators for AI workloads, potentially accelerating deployment cycles and improving performance optimization strategies.